1. Field of the Invention
This invention relates to an analog-to-digital ("A/D") converter and method thereof. The A/D converter employs delta-sigma modulation and more particularly a front-end, multi-bit delta-sigma modulator coupled directly or indirectly to a back-end-single bit delta-sigma modulator.
2. Description of the Related Art
A/D converters are generally known as any device which can convert an analog signal to a digital signal. A typical A/D converter is one which quantifies the incoming analog signal magnitude at various time slices or sampling periods. The quantizer may include a comparator which compares voltage levels of the incoming analog signal and produces an encoded digital output. The sampling rate can be the Nyquist rate or a rate much higher than the Nyquist rate, often known as an "oversampling" rate.
A/D converters which use an oversampling modulator are often known as delta-sigma converters. While a delta-sigma converter is inherently an oversampling converter, oversampling is just one of the techniques contributing to its overall performance. The oversampling modulator, or delta-sigma modulator, preferentially shapes the frequencies of the quantizer-induced noise so that the majority of noise lies between the Nyquist rate and the oversampling rate, and only a small portion is left in the frequency band of interest (i.e., between DC and the Nyquist rate). In this manner, a rather simplistic digital filter can easily remove a bulk of the quantization noise energy, leaving a significantly enhanced signal-to-noise ratio.
Various components are used to form a delta-sigma modulator. Those components include an integrator, a quantizer, and a D/A converter in the feedback loop from the quantizer to a summing node at the input of the integrator. The integrator functions as a low pass filter on the base band signal and a high pass filter on the quantizer noise. The quantizer provides gain and noise along with its normal A/D function. Coupled to receive the digital signal output from the quantizer is a digital filter which removes the quantization noise produced by the quantizer. The filter may have a decimator which decimates the sampled frequency back to the original Nyquist rate. Conversely, the filter may have an interpolator which increases the sampling frequency. There are many types of digital filters which operate exclusively in the digital domain, popular forms of such filters are finite impulse response ("FIR") filters, infinite impulse response ("IIR") filters, comb filters, etc. Decimation or interpolation can be included with or separate from the filter.
The delta-sigma modulator can be fairly simplistic in its architecture or rather complex depending on its targeted application. For example, the delta-sigma modulator can employ feedback to a single summing node at the input of a single integrator, or feedback to multiple summing nodes at the inputs of multiple integrators to form a first order modulator, a second order modulator, etc. An example of a first and second order delta-sigma modulator is shown in U.S. Pat. No. 4,851,841 (herein incorporated by reference). Inclusion of feedback to more than one summing node provides stability to the overall architecture. The presence of a gain scaling factor in the feedback loop to each of the summing nodes is also beneficial in avoiding overload, but at the expense of increased quantization noise. Modem delta-sigma converters attempt to minimize overload by utilizing a "cascaded" arrangement. A cascaded delta-sigma modulator is defined as a modulator having more than one stage of single or multiple-order integrators cascaded together. An interstage summing node is typically used between the stages, and serves to scale down the analog feedback signal. As a result, the level of data, noise, or both, applied to the input of the subsequent stage is maintained at a level necessary to minimize overload upon that stage, and forces the second stage integrator and quantizers to operate in a more linear range. Additionally, a noise cancellation circuit can be used to receive the outputs from both stages. The output of the first stage is summed with a single digital differentiator of the second stage output, and so on for each stage of the multi-stage modulator. The result is that the quantization noise of the first stage is suppressed by the second stage, and the quantization noise of the second stage is suppressed by the third stage. Examples of cascaded delta-sigma modulators are described in U.S. Pat. Nos. 5,654,711; 5,148,166; 4,920,544; and 5,061,928 (each of which are herein incorporated by reference).
In the context of most of the aforementioned delta-sigma modulators, regardless of whether they are single or multi-stage, the modulators typically produce a single bit, serial data stream of digital pulses representing the changing magnitudes of the incoming analog signal. Those pulses are known to exist in a delta-sigma format, where the number of positive pulses compared to negative pulses indicate the relative change in the incoming analog signal voltage magnitude. If, for example, the majority of pulses are positive ("1") rather than negative ("0"), then it is noted that the analog signal is currently near the positive rail. If there are more 0s than 1s, then the analog signal voltage magnitude is closer to the negative voltage rail.
Delta-sigma modulators which produce a one-bit digital signal as a continuous stream of delta-sigma modulated pulses are known as those which employ a one-bit quantizer. Moreover, a delta-sigma modulator which receives an analog signal is known as an analog delta-sigma modulator. Until recently, the most popular form of delta-sigma modulator was the analog delta-sigma modulator which produces a one-bit digital signal from the analog input, henceforth referred to as a one-bit, analog delta-sigma modulator.
A one-bit analog delta-sigma modulator is known to have optimal linearity since the D/A in the feedback loop has only two levels, which makes a one-bit analog delta-sigma modulator inherently linear regardless of its quantization threshold positions. Needing only two levels of quantization, the threshold between those levels need not be accurately positioned because it is preceded by the high DC gain of the integrator. More recent quantizers, however, are multi-level quantizers. A multi-level quantizer, often known as a multi-bit quantizer, has several thresholds and corresponding level spacings. For example, a multi-bit quantizer can use a high-speed flash converter which assigns one comparator for each possible level. The comparator outputs are encoded into an appropriate binary word representative of a multi-bit digital signal. Thus, instead of having a one-bit output, a multi-bit quantizer produces numerous bits forwarded in parallel across corresponding conductors of a multi-conductor bus.
A multi-bit quantizer, or multi-bit analog delta-sigma modulator can, unfortunately, introduce non-linearity directly into the feedback signal, unless the non-linearity is treated. The non-linearity is primarily caused by misplaced levels in the D/A converter feedback loop. The misplaced levels force the encoded digital output to improperly map to an analog signal magnitude. While multi-bit quantizers have many advantages such as lower quantization noise, more stability, and lower complexity needed of the digital decimation filter, multi-bit quantizers may induce non-linear gain and, more importantly, non-linearity into the incoming analog signal itself. There currently exists several strategies for dealing with realizing a more linear D/A converter in the feedback path. For example, the D/A converter can be made of components external to the mixed signal integrated circuit embodying the delta-sigma modulator. Alternatively, critical elements of the D/A converter can be trimmed to ensure their accuracy and compatibility. Another method, often referred to as dynamic element matching, is to apply additional signal processing to the multi-bit data so that the errors introduced by the D/A converter imperfections are randomized (i.e., destroy the correlation between the signal and the D/A noise) and/or noise shaped. There are various algorithms used for achieving this result, as set forth in R. Schreier, "Mismatch-Shaping Digital-to-Analog Conversion," Audio Engineering Society (incorporated herein by reference).
It would be desirable to take advantage of multi-bit quantizers since quantization noise imputed by the quantizer decreases exponentially with the number of bits used in the quantizer. Thus, every additional bit used in the quantizer significantly reduces the quantizer noise and lessens the complexity of both the modulator (i.e., orders and stages) and the digital decimation filter.
It is to be noted, however, that while some digital audio formats can accept an encoded multi-bit delta-sigma signal, other formats require a single bit delta-sigma signal. For example, Super Audio Compact Discs ("SACDs") requires a recording process known as Direct Stream Digital ("DSD"), which uses the same delta sigma modulation single bit digital data stream to achieve a high-quality sonic output. The delta-sigma format used by SACD is a digital data stream that transitions at a rate of 44.1 KHz.times.64, or 2.822 MHz. Other digital audio systems, such as DVD Audio Discs merely require a multi-bit Pulse Code Modulated ("PCM") format, preferably 24-bit PCM, transitioning at 48 KHz, or multiples thereof. It would be desirable to implement an improved A/D converter which can accommodate a super audio CD format employing a one-bit delta-sigma modulated bit stream while using a multi-bit quantizer. It may also be desirable to accommodate both the super audio CD format and the DVD audio format on a single, mixed-signal integrated circuit with outputs dedicated to each of these formats.